With the continuous improvement of integrated circuit (IC) process technologies, the development of portable electronic products demands for light, thin, short, small, high speed, low power consumption and multifunction features. Due to the increase of the signal transmission speed, an IC carrier board is required to transmit signals with higher frequencies, and the interference generated by synchronous switching is aggravated accordingly. To reduce noises of a power delivery system on the IC carrier board, the current high-speed IC carrier board uses several surface mounted devices (SMD) capacitors to filter the noises. Such a capacitor is generally referred to as a decoupling capacitor or a bypass capacitor, mainly for storing rated electric power and supplying the electric power when needed, thereby achieving the effects of absorbing the glitch, reducing the radio frequency (RF) noises and stabilizing the power.
However, to provide an impedance path with a lower and wider frequency band, tens to hundreds of SMD capacitors need to be placed on the IC carrier board, and the capacitors are connected in parallel to achieve the purpose of reducing the low-frequency or high-frequency impedance. With the continuous rise of the IC signal transmission speed in the future and the limited area of the IC carrier board, an equivalent series inductance (ESL) that can be reduced by the SMD capacitors placed on the surface of the IC carrier board is inevitably suppressed.
Compared with the manner of welding the SMD capacitor on the surface of the printed circuit board or the IC carrier board, the manner of embedding the capacitor in the printed circuit board or the IC carrier board enables the capacitor to be closer to a power pin of an IC device, so that the ESL generated by a power delivery path of the capacitor embedded in the substrate at a high frequency is lower than that of the SMD capacitor. Compared with the decoupling capacitor device placed on the surface of the printed circuit board, the decoupling capacitor device embedded in the substrate is placed at a position closer to the IC, and the technology of embedding the capacitor in the substrate is one of the current methods for reducing the ESL generated by the power delivery path of the IC carrier board.
Although the technology of embedding the decoupling capacitor in the substrate is in having a low ESL, restricted by the specification of current leakage of the insulating material, the dielectric constant of the current organic insulating material is hard to exceed 100, and consequently the layers of the embedded planar capacitor can be increased upon the limited thickness and area of the substrate, so as to make the capacitance higher than 0.1 uF, which reduces the process yield and also increases the fabrication cost of the substrate. Furthermore, the capacitance provided by the technology of embedding the capacitor in the substrate cannot meet the demand for hundreds of uF capacitance of the IC carrier board currently. Therefore, it is a problem of the current technology of embedding the capacitor in the substrate in need of solution on how to increase the capacitance of the capacitor embedded in the substrate and increase the effective decoupling bandwidth.